XC68HC705JB3 Motorola, XC68HC705JB3 Datasheet - Page 39
XC68HC705JB3
Manufacturer Part Number
XC68HC705JB3
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705JB3.pdf
(134 pages)
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MC68HC05JB3
REV 1
RESET
V
This section describes the six reset sources and how they initialize the MCU. A
reset immediately stops the operation of the instruction being executed, initializes
certain control bits, and loads the program counter with a user defined reset vec-
tor address. The following conditions produce a reset:
Figure 5-1 shows a block diagram of the reset sources and their interaction.
DD
•
•
•
•
•
•
Initial power up of device (power on reset).
A logic zero applied to the RESET pin (external reset).
Timeout of the COP watchdog (COP reset).
Low voltage applied to the device (LVR reset).
Fetch of an opcode from an address not in the memory map (illegal
address reset).
Detection of USB reset signal (USB reset).
ILLEGAL ADDRESS RESET
USB RESET DETECTION
LOW VOLTAGE RESET
POWER-ON RESET
COP WATCHDOG
Figure 5-1. Reset Sources
INTERNAL
ADDRESS BUS
November 5, 1998
SECTION 5
RESETS
RESETS
GENERAL RELEASE SPECIFICATION
D
RESET
LATCH
S
R
RST
MOTOROLA
TO CPU
AND
SUBSYSTEMS
INTERNAL
CLOCK
5-1
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