HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 11

• Manufacturer Part Number: HD6417021
• Description: SuperH RISC engine
• Manufacturer: Hitachi Semiconductor

5.4
5.5
5.5
Section 6 User Break Controller (UBC)
6.1
6.2
6.3
6.4
6.5
Section 7 Clock Pulse Generator (CPG)
7.1
7.2
7.3
Section 8 Bus State Controller (BSC)
8.1
8.2
5.3.2
Interrupt Operation ............................................................................................................ 70
5.4.1
5.4.2
Interrupt Response Time.................................................................................................... 73
Usage Notes ....................................................................................................................... 74
Overview............................................................................................................................ 75
6.1.1
6.1.2
6.1.3
Register Descriptions......................................................................................................... 77
6.2.1
6.2.2
6.2.3
Operation ........................................................................................................................... 81
6.3.1
6.3.2
6.3.3
Setting User Break Conditions .......................................................................................... 84
Notes.................................................................................................................................. 86
6.5.1
6.5.2
6.5.3
Overview............................................................................................................................ 89
Clock Source...................................................................................................................... 89
7.2.1
7.2.2
Usage Notes ....................................................................................................................... 91
Overview............................................................................................................................ 93
8.1.1
8.1.2
8.1.3
8.1.4
8.1.5
Register Descriptions......................................................................................................... 97
8.2.1
Interrupt Control Register (ICR) .......................................................................... 69
Interrupt Sequence................................................................................................ 70
Stack after Interrupt Exception Processing .......................................................... 72
Features ................................................................................................................ 75
Block Diagram...................................................................................................... 75
Register Configuration ......................................................................................... 76
Break Address Registers (BAR) .......................................................................... 77
Break Address Mask Register (BAMR)............................................................... 78
Break Bus Cycle Register (BBR) ......................................................................... 79
Flow of the User Break Operation........................................................................ 81
Break on Instruction Fetch Cycles to On-Chip Memory...................................... 84
Program Counter (PC) Value Saved in User Break Interrupt Exception
Processing............................................................................................................. 84
On-Chip Memory Instruction Fetch ..................................................................... 86
Instruction Fetch at Branches ............................................................................... 86
Instruction Fetch Break ........................................................................................ 87
Connecting a Crystal Resonator ........................................................................... 89
External Clock Input ............................................................................................ 90
Features ................................................................................................................ 93
Block Diagram...................................................................................................... 93
Pin Configuration ................................................................................................. 95
Register Configuration ......................................................................................... 95
Overview of Areas................................................................................................ 96
Bus Control Register (BCR) ................................................................................ 97
............................................................................ 93
........................................................................ 75
....................................................................... 89