HD6417021 Hitachi Semiconductor, HD6417021 Datasheet - Page 365
HD6417021
Manufacturer Part Number
HD6417021
Description
SuperH RISC engine
Manufacturer
Hitachi Semiconductor
Datasheet
1.HD6417021.pdf
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• Bit 6 (receive data register full (RDRF)): RDRF indicates that RDR contains received data.
Bit 6: RDRF
0
1
Note: The RDR and RDRF are not affected by detection of receive errors or by clearing of the RE
• Bit 5 (overrun error (ORER)): Indicates that data reception ended abnormally due to an
Bit 5: ORER
0
1
Notes: 1. Clearing the RE bit to 0 in the serial control register does not affect the ORER bit, which
HITACHI 352
overrun error.
bit to 0 in the serial control register. They retain their previous contents. If RDRF is still set
to 1 when reception of the next data ends, an overrun error (ORER) occurs and the
received data is lost.
2. RDR continues to hold the data received before the overrun error, so subsequent
retains its previous value.
receive data is lost. Serial receiving cannot continue while ORER is set to 1. In the
clocked synchronous mode, serial transmitting is disabled.
Description
RDR does not contain valid received data (initial value)
RDRF is cleared to 0 when:
• The chip is reset or enters standby mode
• Software reads RDRF after it has been set to 1, then writes 0 in RDRF
• The DMAC reads data from RDR
RDR contains valid received data.
RDRF is set to 1 when serial data is received normally and transferred from
RSR to RDR.
Description
Receiving is in progress or has ended normally (initial value)*
ORER is cleared to 0 when:
• The chip is reset or enters standby mode
• Software reads ORER after it has been set to 1, then writes 0 in ORER
A receive overrun error occurred*
ORER is set to 1 if reception of the next serial data ends when RDRF is set to 1
2
1
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