M52S64322A-10BG ESMT [Elite Semiconductor Memory Technology Inc.], M52S64322A-10BG Datasheet - Page 44
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M52S64322A-10BG
Manufacturer Part Number
M52S64322A-10BG
Description
512K x 32 Bit x 4 Banks Mobile Synchronous DRAM
Manufacturer
ESMT [Elite Semiconductor Memory Technology Inc.]
Datasheet
1.M52S64322A-10BG.pdf
(47 pages)
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Mode Register Set Cycle
All banks precharge should be completed before Mode Register Set cycle and auto refresh cycle.
*Note:
Elite Semiconductor Memory Technology Inc.
MODE REGISTER SET CYCLE
1. CS , RAS , CAS , & WE activation at the same clock cycle with address key will set internal
2. Minimum 2 clock cycles should be met before new RAS activation.
3. Please refer to Mode Register Set table.
mode register.
Extended Mode Register Set Cycle
Publication Date: Aug. 2009
Revision: 1.3
M52S64322A
44/47
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