M24L48512DA ESMT [Elite Semiconductor Memory Technology Inc.], M24L48512DA Datasheet
M24L48512DA
Related parts for M24L48512DA
M24L48512DA Summary of contents
Page 1
... Typical active current: 1mA @ MHz • Low standby power • Automatic power-down when deselected Functional Description The M24L48512DA is a high-performance CMOS pseudo static RAM (PSRAM) organized as 512K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable( ...
Page 2
... Typical values are measured at V and T = 25°C. A Elite Semiconductor Memory Technology Inc. Operating, I Speed (ns MHz Max. Typ.[2] Max M24L48512DA Power Dissipation (mA) CC Standby MAX Typ.[2] Max. Typ.[ Publication Date: Jul. 2008 Revision: 1.1 (µ ...
Page 3
... Data MAX ≥ V − 0.2V, CE2 ≤ ≥ V − 0. 3.6V CC Test Conditions T = 25° MHz CC(typ) M24L48512DA Ambient Temperature ( −25°C to +85°C −40°C to +85°C -55, 60, 70 Min. Typ.[2] Max. 2.7 3.0 3.6 – 0 -0.4 0.4 ...
Page 4
... Min. Max. Min. [11 and 30-pF load capacitance M24L48512DA VFBGA follow standard test 55 17 Unit Ω Ω Ω V –60 –70 Max. Min. Max ...
Page 5
... 13 HIGH for Read Cycle. Elite Semiconductor Memory Technology Inc. –55 Min. Max. Min M24L48512DA –60 –70 Max. Min. Max Publication Date: Jul. 2008 Revision: 1.1 5/12 Unit ...
Page 6
... Chip Enable goes INACTIVE simultaneously with WE =HIGH, the output remains in a high-impedance state. 16.During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied. Elite Semiconductor Memory Technology Inc M24L48512DA Publication Date: Jul. 2008 Revision: 1.1 6/12 ...
Page 7
... ESMT Switching Waveforms (continued) Write Cycle Controlled, OE LOW)[15, 16] Elite Semiconductor Memory Technology Inc. M24L48512DA Publication Date: Jul. 2008 Revision: 1.1 7/12 ...
Page 8
... CE1 WE Address Avoidable Timing 2 CE1 WE Address Elite Semiconductor Memory Technology Inc high (≧t ) one time at least shown as in Avoidable Timing 2. RC 15μs ≧ ＜ 15μs ≧ t ≧ RC 15μs ≧ ＜ M24L48512DA t ≧ RC Publication Date: Jul. 2008 Revision: 1.1 8/12 ...
Page 9
... Data Out Data High Z Ordering Information Speed (ns) Ordering Code 55 M24L48512DA-55BEG 60 M24L48512DA -60BEG 70 M24L48512DA -70BEG 55 M24L48512DA-55BIG 60 M24L48512DA-60BIG 70 M24L48512DA-70BIG Note: 17.H = Logic HIGH Logic LOW Don’t Care. Elite Semiconductor Memory Technology Inc. I/O –I/O Mode 0 7 Power-down Power-down Read Write ...
Page 10
... ESMT Package Diagram Elite Semiconductor Memory Technology Inc. 36-Lead VFBGA ( mm) M24L48512DA Publication Date: Jul. 2008 Revision: 1.1 10/12 ...
Page 11
... ESMT Revision History Revision 1.0 1.1 Elite Semiconductor Memory Technology Inc. Date 2007.07.19 Original 1. Move Revision History to the last 2. Modify voltage range 2.7V~3.3V to 2.7V~3.6V 2008.07.04 3. Add Industrial grade 4. Add Avoid timing M24L48512DA Description Publication Date: Jul. 2008 Revision: 1.1 11/12 ...
Page 12
... If products described here are to be used for such kinds of application, purchaser must do its own quality assurance testing appropriate to such applications. Elite Semiconductor Memory Technology Inc. Important Notice M24L48512DA Publication Date: Jul. 2008 Revision: 1.1 12/12 ...