GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 92

• Manufacturer Part Number: GS4910B
• Description: HD/SD/Graphics Clock and Timing Generator with GENLOCK
• Manufacturer: GENNUM [Gennum Corporation]

Table 3-13: Configuration and Status Registers (Continued)
Register Name
A_Reference_Divide
(GS4911B only)
ACLK1_fs_Multiple
(GS4911B only)
ACLK2_fs_Multiple
(GS4911B only)
ACLK3_fs_Multiple
(GS4911B only)
RSVD
Address
3Eh-3Dh
3Fh
3Fh
40h
40h
41h
41h
42h
36655 - 2
Bit
31-0
15-3
2-0
15-3
2-0
15-3
2-0
–
April 2006
Description
In the internal audio genlock block, this register defines
the denominator of the divide ratio.
This register may be programmed to manually genlock
the audio clock to the video clock.
The default value of this register will vary depending on
the output video standard selected.
Address 3Dh = bits 15-0
Address 3Eh = bits 31-16
Reference:
Reserved. Set these bits to zero when writing to 3Fh.
The user may set this register to select the desired
frequency of the audio clock on ACLK1 (a multiple of the
fundamental sampling rate, fs). The audio clock
frequency may be set as: 512fs, 384fs, 256fs, 192fs,
128fs, 64fs, fs, or z-bit. See
NOTE: To output a frequency of 348fs or 192fs, bit 5 of
register 31h must also be set HIGH.
Reference:
Reserved. Set these bits to zero when writing to 40h.
The user may set this register to select the desired
frequency of the audio clock on ACLK2 (a multiple of the
fundamental sampling rate, fs). The audio clock
frequency may be set as: 512fs, 384fs, 256fs, 192fs,
128fs, 64fs, fs, or z-bit. See
NOTE: To output a frequency of 348fs or 192fs, bit 5 of
register 31h must also be set HIGH.
Reference:
Reserved. Set these bits to zero when writing to 41h.
The user may set this register to select the desired
frequency of the audio clock on ACLK3 (a multiple of the
fundamental sampling rate, fs). The audio clock
frequency may be set as: 512fs, 384fs, 256fs, 192fs,
128fs, 64fs, fs, or z-bit. See
NOTE: To output a frequency of 348fs or 192fs, bit 5 of
register 31h must also be set HIGH.
Reference:
Reserved.
Section 3.6.2.2 on page 56
Section 3.7.2 on page 63
Section 3.7.2 on page 63
Section 3.7.2 on page 63
Table 3-8
Table 3-8
Table 3-8
GS4911B/GS4910B Data Sheet
for more details.
for more details.
for more details.
R/W
R/W
–
R/W
–
R/W
–
R/W
–
Default
–
–
0
–
0
–
0
–
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