GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 107

• Manufacturer Part Number: GS4910B
• Description: HD/SD/Graphics Clock and Timing Generator with GENLOCK
• Manufacturer: GENNUM [Gennum Corporation]

4. Application Reference Design
4.1 GS4911B Typical Application Circuit
JTAG/HOSTb
LOCK_LOST
GENLOCKb
REF_LOST
VID_STD0
VID_STD1
VID_STD2
VID_STD3
VID_STD4
VID_STD5
ASR_SEL0
ASR_SEL1
ASR_SEL2
SDOUT
RESETb
HSYNC
VSYNC
FSYNC
SCLK
GND_XTAL
10FID
SDIN
CSb
38pF
24pF
The 10FID input must be
grounded if it will not be used
NOTE: The GS4911A inputs are 5V tolerant for
3V3 I/O operation only (IO_VDD=3V3)
27MHz
0R
1M
VDD_XTAL
GND_XTAL
10n
1V8_APLL
GND_VPLL
10n
GND_APLL
10n
NOTE: For a solution with the lowest output jitter, the GS1531 or GS1532
serializers are recommended for use with the GS4911B/GS4910B.
36655 - 2
1V8_VPLL
10
11
12
13
14
15
16
65
1
2
3
4
5
6
7
8
9
10n
GND_VPLL
1V8_VPLL
LOCK_LOST
REF_LOST
VID_PLL_VDD
VID_PLL_GND
XTAL_VDD
X1
X2
XTAL_GND
CORE_GND
ANALOG_VDD
NC
ANALOG_GND
AUD_PLL_GND
AUD_PLL_VDD
10FID
HSYNC
GND_PAD
April 2006
1V8_CORE
VDD_IO
10n
10n
VDD_IO
GS4911B
10n
10n
10n
VDD_IO
1V8_PCLK
22R
22R
22R
LVDS/PCLK3_GND
LVDS/PCLK3_VDD
TIMING_OUT8
TIMING_OUT7
TIMING_OUT6
TIMING_OUT5
TIMING_OUT4
TIMING_OUT3
TIMING_OUT2
TIMING_OUT1
GS4911B/GS4910B Data Sheet
10n
CORE_VDD
ASR_SEL0
ASR_SEL1
22R
22R
IO_VDD
PCLK3
PCLK3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
22R
22R
22R
22R
22R
22R
22R
22R
10n
1V8_PCLK
1V8_CORE
Controlled impedance
100-ohms differential
10n
VDD_IO
107 of 113
10n
PCLK1
PCLK2
PCLK3
PCLK3b
TIMING8
TIMING7
TIMING6
TIMING5
TIMING4
TIMING3
TIMING2
TIMING1
ACLK1
ACLK2
ACLK3