GS4910B GENNUM [Gennum Corporation], GS4910B Datasheet - Page 56

• Manufacturer Part Number: GS4910B
• Description: HD/SD/Graphics Clock and Timing Generator with GENLOCK
• Manufacturer: GENNUM [Gennum Corporation]

3.6.2.2 Programming the Internal Audio Genlock Block (GS4911B only)
Alternatively, depending on the information available, the user may program the
Output_H_Reset register (address 17h) instead of programming registers 18h and
19h. Output_H_Reset defines the denominator of the ratio of the output line
frequency to the input line frequency. Before Output_H_Reset is programmed, the
numerator and denominator must be reduced to their lowest factors.
For example, to genlock the output standard 720p/59.94 at 74.25/1.001MHz to the
input standard 525i/29.97 at 27MHz:
Therefore, program Output_H_Reset = 7. The numerator does not have to be
programmed.
NOTE: Either register 17h OR registers 18h and 19h should be programmed.
Programming all three registers will trigger two counter resets.
Programming OUTPUT_FV_RESET is preferred in all cases except where a
custom reference pulse is used in VID_STD[5:0] = 62 (see
page
By default, the audio clocks are always genlocked to the output video clock.
However, if a custom video or audio clock is programmed in the host interface (see
Section 3.9 on page
genlock block.
A simplified version of the GS4911B’s internal audio genlock block is shown in
Figure
Output Video
Figure 3-7: Internal Audio Genlock Block
36655 - 2
Ouput Line Frequency
∴
Input Line Frequency
Output Line Frequency
------------------------------------------------------- -
Clock
( (
Input Line Frequency
f
out
74). In this case, OUTPUT_H_RESET must be used.
3-7.
Internal Audio Genlock Block
April 2006
(host address 3Dh - 3Eh)
A_Reference_Divide
=
=
72), the user must manually program the internal audio
Input Video Clock Frequency
----------------------------------------------------------------------
=
Output Video Clock Frequency
---------------------------------------------------------------------------- -
Video Clocks per Input H
74250000 1000 1716
----------------------------------------------------------- -
27000000 1001 1650
Video Clocks per Output H
×
×
(host address 3Bh - 3Ch)
A_Feedback_Divide
Comparator
Phase
×
×
GS4911B/GS4910B Data Sheet
=
=
20
----- -
27000000
----------------------- -
7
Synthesizer
=
27MHz
1716
Clock
74250000
----------------------- -
1650
Section 3.10.1 on
×
1000
----------- -
1001
Audio Sampling Clock
Integer Multiple of
the Fundamental
(n
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*
f
s
(