78P2352-IEL TERIDIAN [Teridian Semiconductor Corporation], 78P2352-IEL Datasheet - Page 30

• Manufacturer Part Number: 78P2352-IEL
• Description: Dual Channel OC-3/ STM1-E/ E4 LIU
• Manufacturer: TERIDIAN [Teridian Semiconductor Corporation]

ELECTRICAL SPECIFICATIONS
Note 1 – The maximum “steady state” amplitude should not exceed the 0.55V limit. Overshoots and other transients are permitted to fall into
the shaded area bounded by the amplitude levels 0.55V and 0.6V, provided that they do not exceed the steady state level by more than
0.05V.
Note 2 – For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 µF, to the input of
the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input
signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any
such adjustment should be the same for both masks and should not exceed ±0.05V. This may be checked by removing the input signal again
and verifying that the trace lies with ±0.05V of the nominal zero level of the masks.
Note 3 – Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding or
succeeding pulses, with both pulse masks fixed in the same relation to a common timing reference, i.e. with their nominal start and finish
edges coincident. The masks allow for HF jitter caused by intersymbol interference in the output stage, but not for jitter present in the timing
signal associated with the source of the interface signal. When using an oscilloscope technique to determine pulse compliance with the mask,
it is important that successive traces of the pulses overlay in order to suppress the effects of low frequency jitter. This can be accomplished by
several techniques [e.g. a) triggering the oscilloscope on the measured waveform or b) providing both the oscilloscope and the pulse output
circuits with the same clock signal].
Note 4 – For the purpose of these masks, the rise time and decay time should be measured between –0.4V and 0.4V, and should not exceed
2ns.
Note 5 –The inverse pulse will have the same characteristics, noting that the timing tolerance at the level of the negative and positive
transitions are ± 0.1ns and ±0.5ns respectively.
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-0.05
-0.40
-0.45
-0.50
-0.55
-0.60
0.60
0.55
0.50
0.45
0.40
0.05
V
Figure 12 – Mask of a Pulse corresponding to a binary One in E4 mode.
Zero Level
Nominal
(Note 2)
(Note 1)
0.1ns
1ns
1ns
1.795 ns
0.1ns

(continued)
2006 Teridian Semiconductor Corporation
3.59ns
1.35ns
T = 7.18ns
(Note 1)
1.35ns
3.59ns
Nominal
0.5ns
Pulse
1.795 ns
1ns
OC-3/ STM1-E/ E4 LIU
(Note 1)
Dual Channel
1ns
0.5ns
78P2352
Rev. 2.4