73S8014RT TERIDIAN [Teridian Semiconductor Corporation], 73S8014RT Datasheet
73S8014RT
Related parts for 73S8014RT
73S8014RT Summary of contents
Page 1
... Simplifying System Integration™ DESCRIPTION The Teridian 73S8014RT is a single smart card (ICC) interface circuit derived from the 73S8024RN industry-standard electrical interface but adds support for 1.8V smart card applications. The 73S8014RT has been optimized to match most of the typical Set-Top Box / A/V Conditional Access applications. ...
Page 2
... VDD FAULT bias currents R-C CONTROLLER OSC. 1.5MHz AND REGISTERS FAULT LOGIC SC SEQUENCER CLOCK CLOCK GENERATION SMART CARD I/O BUFFER Figure 1: 73S8014RT Block Diagram VPC VCC FAULT vref LDO REGULATOR RESET BUFFER CLOCK BUFFER vcc circuits 73S8014RT GND VCC RST CLK VDD CKT ...
Page 3
... Smart Card Interface Requirements ........................................................................................................... 9 2.5 Characteristics: Digital Signals.................................................................................................................. 11 2.6 DC Characteristics .................................................................................................................................... 12 2.7 Voltage Fault Detection Circuits ................................................................................................................ 13 3 Applications Information ............................................................................................................................... 14 3.1 Example 73S8014RT Schematics ............................................................................................................ 14 3.2 System Controller Interface ....................................................................................................................... 16 3.3 Power Supply and Voltage Supervision .................................................................................................... 16 3.4 Card Power Supply ................................................................................................................................... 16 3.5 On-Chip Oscillator and Card Clock ........................................................................................................... 17 3.6 Activation Sequence ................................................................................................................................. 17 ...
Page 4
... Figure 17: Oscillator Circuit ..................................................................................................................................... 25 Figure 18: VDD .............................................................................................................................................. 26 FLT_ADJ Figure 19: Mechanical Drawing 20-Pin SO Package .............................................................................................. 27 Tables Table 1: 73S8014RT 20-Pin SOP Pin Definitions ..................................................................................................... 6 Table 2: Absolute Maximum Device Ratings ............................................................................................................. 8 Table 3: Recommended Operating Conditions ......................................................................................................... 8 Table 4: Package Thermal Parameters ..................................................................................................................... 8 Table 5: DC Smart Card Interface Requirements ..................................................................................................... 9 Table 6: Digital Signals Characteristics ................................................................................................................... 11 Table 7: DC Characteristics ...
Page 5
... DS_8014RT_015 1 Pinout The 73S8014RT is supplied as a 20-pin SO package. Rev. 1.0 Figure 2: 73S8014RT 20-SOP Pin Out 73S8014RT Data Sheet 5 ...
Page 6
... Table 1 provides the 73S8014RT pin names, pin numbers, type, equivalent circuits and descriptions. Table 1: 73S8014RT 20-Pin SOP Pin Definitions Pin Pin Name Number Type Card Interface I RST 15 O CLK 17 O PRES 19 I VCC 18 PSO GND 16 GND Host Processor Interface CMDVCC% ...
Page 7
... DD Figure 18 adjust the V value (that controls deactivation of the card). DDF Must be left open if unused. System interface supply voltage and supply voltage for internal Figure 11 circuitry. Figure 11 LDO regulator power supply source. – Digital ground. 73S8014RT Data Sheet 7 ...
Page 8
... Voltage Fault Detection Circuits 2.1 Absolute Maximum Ratings Table 2 lists the maximum operating conditions for the 73S8014RT. Permanent device damage may occur if absolute maximum ratings are exceeded. Exposure to the extremes of the absolute maximum rating for extended periods may affect device reliability. The smart card interface pins are protected against short circuits to V ground, and each other ...
Page 9
... DS_8014RT_015 2.4 Smart Card Interface Requirements Table 5 lists the 73S8014RT Smart Card interface requirements. Table 5: DC Smart Card Interface Requirements Symbol Parameter Card Power Supply (V ) Regulator CC ° General conditions, -40 C < T < 85 Card supply voltage V including ripple and CC noise V V Ripple CCrip ...
Page 10
Symbol Parameter Interface Requirements – Data Signals: I/O and Host Interfaces: I/OUC and V requirements do not pertain to I/OUC. SHORTL SHORTH INACT Output level, high (I/OUC Output level, high (I/O) Output level, low ...
Page 11
... CLK slew rate SR5V Output rise time, fall time R F δ Duty cycle for CLK 2.5 Characteristics: Digital Signals Table 6 lists the 73S8014RT digital signals characteristics. Symbol Parameter Digital I/O Except for XTALIN and XTALOUT V Input Low Voltage IL V Input High Voltage IH ...
Page 12
... ILXTAL V Input High Voltage - XTALIN IHXTAL Input Current - I ILXTAL XTALIN Max freq. Osc or external f MAX clock δin External input duty cycle limit 2.6 DC Characteristics Table 7 lists the 73S8014RT DC characteristics. Symbol Parameter I Supply Current DD I Supply Current PC V supply current when PC I PCOFF V ...
Page 13
... DS_8014RT_015 2.7 Voltage Fault Detection Circuits Table 8 lists the 73S8014RT Voltage Fault Detection Circuits. Symbol Parameter V fault Voltage supervisor DDF DD threshold) V fault Voltage supervisor CCF CC threshold) Rev. 1.0 Table 8: Voltage Fault Detection Circuits Condition No external resistor on VDDF_ADJ pin ...
Page 14
... Applications Information This section provides general usage information for the design and implementation of the 73S8014RT. The documents listed in Related Documentation 3.1 Example 73S8014RT Schematics Figure 3 shows a typical application schematic for the implementation of the 73S8014RT. 14 provide more detailed information. Rev. 1.0 ...
Page 15
... XTALIN 10 22pF C2 XTALOUT Y1 CRYSTAL 73S8014RT C3 22pF See NOTE 4 R2 47K VDD R4 1K Card detection switch is normally open Smart Card Connector Figure 3: 73S8014RT – Typical Application Schematic 73S8014RT Data Sheet See note 5 VDD R3 20 Rext2 CLKDIV1 19 PRES 18 VCC 17 CLK 16 GND 15 RST 14 I/O See NOTE 1 ...
Page 16
... Power Supply and Voltage Supervision The Teridian 73S8014RT smart card interface ICs incorporate an LDO voltage regulator. The voltage output is controlled by both the CMDVCC% and CMDVCC# pins. This regulator is able to provide either 1.8V card voltage from the power supply applied on the VPC pin ...
Page 17
... CMDVCC#. 3.5 On-Chip Oscillator and Card Clock The 73S8014RT devices have an on-chip oscillator that can generate the smart card clock using an external crystal (connected between the pins XTALIN and XTALOUT) to set the oscillator frequency. When the clock signal is available from another source, it can be connected to the pin XTALIN, and the pin XTALOUT should be left unconnected ...
Page 18
I/O goes to reception state >0.5μs, CLK starts, RST to become the copy of RSTIN 3 Figure 4: Activation Sequence – RSTIN Low When ...
Page 19
Deactivation Sequence Deactivation is initiated either by the system controller by setting CMDVCC% and CMDVCC# high, or automatically in the event of hardware faults. Hardware faults are over-current, V session. The following steps show the deactivation sequence and the ...
Page 20
Fault Detection and OFF There are two different cases that the system controller can monitor the OFF signal: to query regarding the card presence outside card sessions, or for fault detection during card sessions. Outside a card session: In ...
Page 21
I/O I/OUC Delay from I/O to I/OUC: Delay from I/OUC to I/O: Rev. 1.0 Neutral State I/O reception Yes I/O & not I/OUC No I/OUC No & not I/O Yes I/OUC in I/OUC yes Figure 8: I/O and I/OUC State ...
Page 22
Equivalent Circuits This section provides illustrations of circuits equivalent to those described in the pinout section. Figure 11: Power Input/Output Circuit Figure 10: Open Drain type – OFF PIN ESD To Internal circuits , ...
Page 23
From circuit Figure 12: Type 5 – Smart Card CLK Driver Circuit From circuit Figure 13: Type 6 – Smart Card RST Driver Circuit Rev. 1.0 VCC VERY STRONG ESD PFET CLK PIN ESD VERY STRONG NFET VCC STRONG ESD ...
Page 24
From circuit To circuit Figure 14: Type 7A – Smart Card IO Interface Circuit From circuit To circuit Figure 15: Type 7B – Smart Card IOUC Interface Circuit 24 VCC STRONG PFET 400ns DELAY STRONG NFET ESD VDD STRONG PFET ...
Page 25
Pull-up Disable To circuit Pull-down Enable Pins CMDVCC%, CMDVCC#, CLKDIV1 and CLKDIV2 have the pull-up enabled. Note: Pins RSTIN, CLKIN, PRES have the pull-down enabled. XTALIN PIN Rev. 1.0 VERY WEAK PFET Figure 16: Type 8 – General Input Circuit ...
Page 26
R = 40k R = 60k 26 VDD FAULT VREF = 1.400v DETECTION + - R = 0.4k (approx.) Figure 18: VDD FLT_ADJ VDD PIN ESD VDDF_ ESD ADJ PIN ESD Rev. 1.0 ...
Page 27
Mechanical Drawing Inches (mm) 0.016(.406) Detail A Figure 19: Mechanical Drawing 20-Pin SO Package Rev. 1.0 + .005(.127) 0.5050(12.82) - .009(.228) + .005(.127) - .009(.228) 0.5050(12.82) + .004(.101) 0.050(1.27) - .003(.076) TYP 0°- 8° BASE PLANE SEATING PLANE ± ...
Page 28
... Related Documentation The following 73S8014RT document is available from Teridian Semiconductor Corporation: 73S8014R/RN/RT 20SO Demo Board User Manual 8 Contact Information For more information about Teridian Semiconductor products or to check the availability of the 73S8014RT, contact us at: 6440 Oak Canyon Road Irvine, CA 92618-5201 Telephone: (714) 508-8800 FAX: (714) 508-8878 Email: scr ...
Page 29
Revision History Revision Date 1.0 12/12/2008 First publication. © 2008 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Simplifying System Integration is a trademark of Teridian Semiconductor Corporation. All other trademarks ...