78P2352-IEL TERIDIAN [Teridian Semiconductor Corporation], 78P2352-IEL Datasheet - Page 10

• Manufacturer Part Number: 78P2352-IEL
• Description: Dual Channel OC-3/ STM1-E/ E4 LIU
• Manufacturer: TERIDIAN [Teridian Semiconductor Corporation]

REGISTER DESCRIPTION
LEGEND
GLOBAL REGISTERS
ADDRESS 0-0: MASTER CONTROL REGISTER
Page: 10 of 42
TYPE
BIT
4:3
2:1
R/O
R/C
7
6
5
0
NAME
CKSL
SRST
DESCRIPTION
Read only
Read and Clear
PAR
[1:0]
E4
--
--
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
VALUE
DFLT
XX
X0
0
0
0
0
(CONTINUED)

DESCRIPTION
Line Rate Selection:
Selects the line rate of all channels as well as the input clock frequency
at the CKREFP/N pins.
Unused
Serial/Parallel Interface Selection:
Selects the interface to the framer.
Reference Clock Frequency Selection:
Selects the reference clock frequency input at CKREFP/N pins.
Secondary values correspond to E4 frequencies. Default values depend
on the CKSL pin selection upon reset.
Reserved.
Register Soft-Reset:
When this bit is set, all registers are reset to their default values. This
register bit is self-clearing.
2006 Teridian Semiconductor Corporation
0: OC-3, STS-3, STM-1 (155.52MHz)
1: E4 (139.264MHz)
0: Serial LVPECL
1: 4-bit Parallel CMOS
11: 155.52MHz / 139.264MHz (differential LVPECL)
10: 77.76MHz / NA (single-ended CMOS)
00: 19.44MHz / 17.408MHz (single-ended CMOS)
TYPE
R/W
DESCRIPTION
Read or Write
OC-3/ STM1-E/ E4 LIU
Dual Channel
78P2352
Rev. 2.4