Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 33
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Z8F082A28100KIT
Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8F082A28100KIT.pdf
(244 pages)
- Current page: 33 of 244
- Download datasheet (3Mb)
Register Map
PS024705-0405
Address (Hex)
General Purpose RAM
Z8F082A/Z8F081A Devices
000–3FF
400–EFF
Timer 0
F00
F01
F02
F03
F04
F05
F06
F07
Timer 1
F08
F09
F0A
F0B
F0C
F0D
F0E
F0F
F10–F3F
UART 0
F40
XX=Undefined
Table 7 provides the address map for the Register File of the Z8 Encore! XP
Series devices. Not all devices and package styles in the Z8 Encore! XP
support the ADC, or all of the GPIO Ports. Consider registers for unimplemented periph-
erals as Reserved.
Register Description
General-Purpose Register File RAM
Reserved
Timer 0 High Byte
Timer 0 Low Byte
Timer 0 Reload High Byte
Timer 0 Reload Low Byte
Timer 0 PWM High Byte
Timer 0 PWM Low Byte
Timer 0 Control 0
Timer 0 Control 1
Timer 1 High Byte
Timer 1 Low Byte
Timer 1 Reload High Byte
Timer 1 Reload Low Byte
Timer 1 PWM High Byte
Timer 1 PWM Low Byte
Timer 1 Control 0
Timer 1 Control 1
Reserved
UART0 Transmit Data
UART0 Receive Data
Table 7. Register File Address Map
P R E L I M I N A R Y
Mnemonic
—
—
T0H
T0L
T0RH
T0RL
T0PWMH
T0PWML
T0CTL0
T0CTL1
T1H
T1L
T1RH
T1RL
T1PWMH
T1PWML
T1CTL0
T1CTL1
—
U0TXD
U0RXD
Z8 Encore! XP
Reset (Hex)
XX
XX
00
01
FF
FF
00
00
00
00
00
01
FF
FF
00
00
00
00
XX
XX
XX
Product Specification
®
®
F08xA Series
F08xA Series
Page #
72
72
73
73
73
74
74
75
72
72
73
73
73
74
74
72
95
96
®
Register Map
F08xA
15
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