Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 222
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Z8F082A28100KIT
Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8F082A28100KIT.pdf
(244 pages)
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PS024705-0405
(Output)
(Output)
TXD
(Input)
CTS
DE
UART Timing
Parameter
UART
T
T
T
1
2
3
Figure 35 and Table 130 provide timing information for UART pins for the case where
CTS is used for flow control. The CTS to DE assertion delay (T1) assumes the transmit
data register has been loaded with data prior to CTS assertion.
bit 7
Abbreviation
CTS Fall to DE output delay
DE assertion to TXD falling edge (start bit) delay ± 5
End of Stop Bit(s) to DE deassertion delay
parity
stop
Figure 35. UART Timing With CTS
Table 130. UART Timing With CTS
end of
stop bit(s)
T3
P R E L I M I N A R Y
T1
Z8 Encore! XP
2 * XIN
± 5
period
Minimum
T2
Delay (ns)
Product Specification
2 * XIN period
+ 1 bit time
start
Electrical Characteristics
Maximum
®
F08xA Series
bit 0
bit 1
204
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