Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 138

• Manufacturer Part Number: Z8F082A28100KIT
• Description: Z8 Encore XP-R F08xA Series with eXtended Peripherals
• Manufacturer: ZILOG [Zilog, Inc.]

BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
ADC Data High Byte Register
ADC Data Low Bits Register
R
R
X
X
7
7
100 = Differential, unbuffered input
101 = Differential, buffered input with unity gain
110 = Reserved
111 = Differential, buffered input with 20x gain
The ADC Data High Byte register contains the upper eight bits of the ADC output. The
output is an 11-bit two’s complement value. During a single-shot conversion, this value is
invalid. Access to the ADC Data High Byte register is read-only. Reading the ADC Data
High Byte register latches data in the ADC Low Bits register.
ADCDH—ADC Data High Byte
This byte contains the upper eight bits of the ADC output. These bits are not valid during a
single-shot conversion. During a continuous conversion, the most recent conversion out-
put is held in this register. These bits are undefined after a Reset.
The ADC Data Low Byte register contains the lower bits of the ADC output as well as an
overflow status bit. The output is a 11-bit two’s complement value. During a single-shot
conversion, this value is invalid. Access to the ADC Data Low Byte register is read-only.
Reading the ADC Data High Byte register latches data in the ADC Low Bits register.
ADCDL—ADC Data Low Bits
These bits are the least significant three bits of the 11-bits of the ADC output. These bits
are undefined after a Reset.
ADCDL
Table 72. ADC Data High Byte Register (ADCD_H)
Table 73. ADC Data Low Bits Register (ADCD_L)
X
R
X
R
6
6
R
R
X
X
5
5
P R E L I M I N A R Y
X
R
X
R
4
4
ADCDH
F72H
F73H
R
R
X
X
3
3
Reserved
Z8 Encore! XP
X
R
X
R
2
2
Product Specification
Analog-to-Digital Converter
R
R
X
X
1
1
®
F08xA Series
OVF
X
R
X
R
0
0
120