Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 112
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Z8F082A28100KIT
Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.Z8F082A28100KIT.pdf
(244 pages)
- Current page: 112 of 244
- Download datasheet (3Mb)
PS024705-0405
UART Baud Rate Generator
Baud Rate Generator Interrupts
If the Baud Rate Generator (BRG) interrupt enable is set, the UART Receiver interrupt
asserts when the UART Baud Rate Generator reloads. This condition allows the Baud
Rate Generator to function as an additional counter if the UART functionality is not
employed.
The UART Baud Rate Generator creates a lower frequency baud rate clock for data trans-
mission. The input to the Baud Rate Generator is the system clock. The UART Baud Rate
High and Low Byte registers combine to create a 16-bit baud rate divisor value
Figure 14.UART Receiver Interrupt Service Routine Flow
Read Data
P R E L I M I N A R Y
No
clears RDA bit and
Read Data which
resets error bits
Discard Data
Read Status
Receiver
Receiver
Interrupt
Ready
Errors?
Yes
Z8 Encore! XP
Product Specification
®
F08xA Seriess
UART
94
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