Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 181

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Z8F082A28100KIT

Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
Oscillator Control Register Definitions
BITS
FIELD
RESET
R/W
ADDR
PS024705-0405
Caution:
Oscillator Control Register
INTEN
R/W
1
7
the Watch-Dog Timer failure can be detected. A very slow system clock results in very
slow detection times.
The Oscillator Control Register (OSCCTL) enables/disables the various oscillator circuits,
enables/disables the failure detection/recovery circuitry and selects the primary oscillator,
which becomes the system clock.
The Oscillator Control Register must be unlocked before writing. Writing the two step
sequence
is locked at successful completion of a register write to the OSCCTL.
INTEN—Internal Precision Oscillator Enable
1 = Internal precision oscillator is enabled
0 = Internal precision oscillator is disabled
XTLEN—Crystal Oscillator Enable; this setting overrides the GPIO register control for
PA0 and PA1
1 = Crystal oscillator is enabled
0 = Crystal oscillator is disabled
WDTEN—Watchdog Timer Oscillator Enable
1 = Watch-Dog Timer oscillator is enabled
0 = Watch-Dog Timer oscillator is disabled
POFEN—Primary Oscillator Failure Detection Enable
1 = Failure detection and recovery of primary oscillator is enabled
0 = Failure detection and recovery of primary oscillator is disabled
It is possible to disable the clock failure detection circuitry as well as all functioning
clock sources. In this case, the Z8 Encore! XP
and can only be recovered by Power-On-Reset.
XTLEN
E7H
R/W
Table 102. Oscillator Control Register (OSCCTL)
6
0
followed by
WDTEN
R/W
5
1
18H
P R E L I M I N A R Y
to the Oscillator Control Register unlocks it. The register
POFEN
R/W
0
4
F86H
WDFEN
R/W
3
0
®
F08xA Series device ceases functioning
Z8 Encore! XP
R/W
0
2
Product Specification
SCKSEL
R/W
1
0
®
F08xA Series
Oscillator Control
R/W
0
0
163

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