Z8F082A28100KIT ZILOG [Zilog, Inc.], Z8F082A28100KIT Datasheet - Page 223

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Z8F082A28100KIT

Manufacturer Part Number
Z8F082A28100KIT
Description
Z8 Encore XP-R F08xA Series with eXtended Peripherals
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS024705-0405
(Output)
(Output)
TXD
DE
Parameter
UART
T
T
1
2
Figure 36 and Table 131 provide timing information for UART pins for the case where
CTS is not used for flow control. DE asserts after the transmit data register has been writ-
ten. DE remains asserted for multiple characters as long as the transmit data register is
written with the next character before the current character has completed.
Abbreviation
DE assertion to TXD falling edge (start bit) delay
End of Stop Bit(s) to DE deassertion delay (Tx
data register is empty)
T1
Table 131. UART Timing Without CTS
Figure 36. UART Timing Without CTS
start
bit0
P R E L I M I N A R Y
bit 1
bit 7
Z8 Encore! XP
Minimum
1 * XIN
period
± 5
parity
Delay (ns)
Product Specification
Electrical Characteristics
stop
1 bit time
Maximum
®
end of
stop bit(s)
F08xA Series
T2
205

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