HYB18T512160AF-3 QIMONDA [Qimonda AG], HYB18T512160AF-3 Datasheet - Page 21

no-image

HYB18T512160AF-3

Manufacturer Part Number
HYB18T512160AF-3
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) w = write only
Rev. 1.71, 2007-01
03062006-CPCN-4867
Field
BA2
BA1
BA0
A
SRF
A
Bits
16
15
14
[13:8]
[7]
[6:0]
Type
reg.addr
w
w
w
1)
Description
Bank Address [2]
Note: BA2 is not available on 256 Mbit and 512 Mbit components
0
Bank Adress [1]
1
Bank Adress [0]
0
Address Bus [13:8]
Note: A13 is not available for 256 Mbit and x 16 512 Mbit configuration
0
Address Bus [7]
Note: When DRAM is operated at 85 °C
0
1
Address Bus [6:0]
0
B
B
B
B
B
B
B
EMRS(2) Programming Extended Mode register Definition (BA[2:0]=010
BA2 Bank Address
BA1 Bank Address
BA0 Bank Address
A [13:8] Address bits
be enabled by setting bit A7 to "1" before the self refresh mode can be entered.
A7 disable
A7 enable, adapted self refresh rate for
A [6:0] Address bits
21
T
CASE
T
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
CASE
< 95 °C the extended self refresh rate must
> 85 °C
512-Mbit DDR2 SDRAM
Internet Data Sheet
TABLE 14
B
)

Related parts for HYB18T512160AF-3