HYB18T512160AF-3 QIMONDA [Qimonda AG], HYB18T512160AF-3 Datasheet - Page 11

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HYB18T512160AF-3

Manufacturer Part Number
HYB18T512160AF-3
Description
512-Mbit Double-Data-Rate-Two SDRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
Rev. 1.71, 2007-01
03062006-CPCN-4867
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
11
HYB18T512[40/80/16]0AF(L)–[3/3S/3.7/5]
Abbreviations for Buffer Type
Abbreviations for Pin Type
512-Mbit DDR2 SDRAM
Internet Data Sheet
TABLE 7
TABLE 8

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