NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 98

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

Serial peripheral interface (SPI) mode
Table 66.
1. See
2.
3. The data transferred must not cross a physical block boundary unless READ_BLK_MISALIGN is set in the CSD register.
4. The data transferred must not cross a physical block boundary unless WRITE_BLK_MISALIGN is set in the CSD register.
5. R1b: R1 response with an optional busy flag (see
6. 32 write protection bits (representing 32 write protect groups starting at the specified address) followed by 16 CRC bits are
7. RD/WR is set to ‘1’ if the host receives a data block from the device, and to ‘0’ if the host sends a data block to the device.
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CMD58
CMD59
CMD60
-63
INDEX
CMD
transferred in a payload format via the data line. The last (least significant) bit of the protection bits corresponds to the first
addressed group. If the addresses of the last groups are outside the valid range, then the corresponding write protection
bits are set to zero.
Data address on the NAND08GAH0A and the NAND16GAH0D is a 32-bit byte address.
Section 8.3: Card specific data register (CSD)
mode
SPI
Yes
Yes
No
Commands and arguments (continued)
NAND16GAH0D
NAND08GAH0A
Argument
option
None
[31:1]
CRC
stuff
bits
[0]
Response
Section
for the value of the default block length.
R3
R1
10.6.2).
CRC_ON_OFF
Abbreviation
READ_OCR
NAND08GAH0A, NAND16GAH0D
Reads the OCR register of a
device
Turns the CRC option on or
off
CRC option bit = ‘1’ on
CRC option bit = ‘0’ off
Command description