NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 24
NAND08GAH0A
Manufacturer Part Number
NAND08GAH0A
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet
1.NAND08GAH0A.pdf
(116 pages)
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High speed MultiMediaCard operation
5
5.1
24/116
High speed MultiMediaCard operation
Overview
All communication between the host and the device is controlled by the host (master). The
host sends two types of command:
●
●
A general overview of the command flow is shown in
mode and in
command tables
between the current device state, the received command and the resulting state are listed in
Table
with the restrictions for controlling the clock signal, and device commands, state transitions
and timings.
Three operating modes are defined for MultiMediaCard devices:
●
●
●
Table 10
state in the device state diagrams is associated with a bus mode and an operation mode
(Figure 10
A command received with an incorrect CRC is ignored. If the command was issued during
an operation (for example block read), the device continues the operation until it receives a
correct host command.
Broadcast commands intended for all MultimediaCard devices. They are kept for
backwards compatibility to previous MultiMediaCard systems, where more than one
device was allowed on the bus.
Addressed (point-to-point) commands which are sent to the addressed device and
cause it to respond.
Card Identification mode
The host enter Card Identification mode after reset and while it is looking for new
devices connected to the bus.
MultiMediaCard devices enter this mode after reset until the SET_RCA command
(CMD3) is received.
Interrupt mode (not supported)
Data Transfer mode
The device enters Data Transfer mode once an RCA is assigned to it.
The host will enter data transfer mode after identifying all the devices on the bus.
27. The different operating modes are presented in the following sections, together
shows the relations between bus modes, operation modes and device states. Each
and
Figure 12
Figure
(Table
12).
for the Data Transfer mode. The commands are listed in the
20,
Table
21,
Table
22,
Table
Figure 10
23, and
NAND08GAH0A, NAND16GAH0D
Table
for the Card Identification
24). The relation
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