NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 90

• Manufacturer Part Number: NAND08GAH0A
• Manufacturer: NUMONYX [Numonyx B.V]

Serial peripheral interface (SPI) mode
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Block Write operation with pre-defined block count the host must issue the
SET_BLOCK_COUNT command (CMD23) just before sending the
WRITE_MULTIPLE_BLOCK (CMD25) command. Otherwise the device starts an open-
ended Multiple Block Write operation that can be stopped using the ‘Stop tran’ token.
The host can abort writing at any time, within a Multiple Block Write operation, regardless of
its type. Transaction abort is done by sending the ‘Stop tran’ token. If a Multiple Block Write
operation with pre-defined block count is aborted, the data in the remaining blocks is not
defined.
If the host provides an out-of-range address as an argument to either CMD17 or CMD18, or
if the currently defined block length is illegal for a read operation, the device rejects the
command, remains in Tran state and responds with the ADDRESS_OUT_OF_RANGE or
BLOCK_LEN_ERROR bit set, respectively.
If the host sets the argument of the SET_BLOCK_COUNT command (CMD23) to all 0’s,
then the command is accepted, however, a subsequent write follows the open-ended
Multiple Block Write protocol (STOP_TRANSMISSION command - CMD12 - is required).
If the device detects a CRC error or a programming error (such as write protect violation, out
of range, address misalignment or internal error) during a Multiple Block Write operation
(both types) it reports the failure in the data-response token and ignores any further
incoming data blocks. The host must than abort the operation by sending the ‘Stop tran’
token.
If the host uses partial blocks whose accumulated length is not block aligned, and block
misalignment is not allowed (CSD parameter WRITE_BLK_MISALIGN is not set), the
device detects the block misalignment error upon reception of the first misaligned block,
aborts the write operation, and ignores all further incoming data. The host must abort the
operation by sending the ‘Stop tran’ token. The devices then responds by setting the
ADDRESS_MISALIGN bit.
Once the programming operation has completed (either successfully or with an error), the
host must check the results of the programming (or the cause of the error if already reported
in the data-response token) using the SEND_STATUS command (CMD13).
If the host sends a ‘Stop tran’ token after the device received the last data block of a multiple
block operation with pre-defined number of blocks, it is interpreted as the beginning of an
illegal command and the device responds accordingly.
When the device is busy, resetting the CS signal does not terminate the programming
process. The device simply releases the DataOut line (tri-state) and continues with the
programming. If the device is reselected before the programming is finished, the DataOut
line is forced back to Low and all commands are rejected.
Resetting a device (using CMD0) terminates any pending or active programming operations.
This may destroy the data formats on the device. It is the responsibility of the host to prevent
this.
NAND08GAH0A, NAND16GAH0D