NAND08GAH0A NUMONYX [Numonyx B.V], NAND08GAH0A Datasheet - Page 54

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NAND08GAH0A

Manufacturer Part Number
NAND08GAH0A
Description
Manufacturer
NUMONYX [Numonyx B.V]
Datasheet

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Device registers
8
8.1
54/116
Device registers
There are five different registers within the device interface:
These registers are used for the serial data communication. The device does not implement
the DSR register.
The MultiMediaCard has a status register to provide information about the device current
state and completion codes for the last host command.
Operation conditions register (OCR)
The 32-bit operation conditions register stores the V
Flash memory component. The device is capable of communicating (identification
procedure and data transfer) with any MultiMediaCard host using any operating voltage
within 1.65 V and 1.95 V (low-voltage range) or 2.7 V and 3.6 V (high-voltage range)
depending on the voltage range supported by the host. The 31 least significant bits are
constant. Bit 32 is the busy flag as defined in the MultiMediaCard specification document.
If the host tries to change the OCR values during an initialization procedure the changes in
the OCR content will be ignored.
The level coding of the OCR register is as follows:
Table 32.
1. The voltage for internal Flash memories (V
2. This bit is set to Low if the device has not finished the power-up routine.
Operation conditions register (OCR)
Card identification register (CID)
Card specific data register (CSD)
Relative card address register (RCA)
DSR (driver stage register)
Extended card specific data register (EXT_CSD)
Restricted voltage windows = Low
Device busy = Low
OCR bit
23 to 15
30 to 24
14 to 8
6 to 0
OCR register definition
31
7
2.7 - 3.6 (High V
CCi
Description
) should be in the 2.7 V to 3.6 V range.
Low V
Reserved
Reserved
2.0 - 2.6
CCQ
CCQ
Power-up status bit (busy)
range)
CCQ
, the input/output voltage of the
NAND08GAH0A, NAND16GAH0D
(1)
MultiMediaCard
1 1111 1111b
000 0000b
000 0000b
000 0000b
(2)
1b

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