M45PE10-VMN6 STMICROELECTRONICS [STMicroelectronics], M45PE10-VMN6 Datasheet - Page 6

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M45PE10-VMN6

Manufacturer Part Number
M45PE10-VMN6
Description
1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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M45PE10
SPI MODES
These devices can be driven by a microcontroller
with its SPI peripheral running in either of the two
following modes:
For these two modes, input data is latched in on
the rising edge of Serial Clock (C), and output data
Figure 4. Bus Master and Memory Devices on the SPI Bus
Note: The Write Protect (W) signal should be driven, High or Low as appropriate.
Figure 5. SPI Modes Supported
6/34
CPOL
0
1
CPOL=0, CPHA=0
CPOL=1, CPHA=1
SPI Interface with
CPHA
(CPOL, CPHA) =
CS3
(0, 0) or (1, 1)
(ST6, ST7, ST9,
0
1
ST10, Others)
Bus Master
CS2
D
Q
C
C
CS1
MSB
SDO
SDI
SCK
S
SPI Memory
C Q D
Device
W
RP
is available from the falling edge of Serial Clock
(C).
The difference between the two modes, as shown
in
master is in Stand-by mode and not transferring
data:
Figure
C remains at 0 for (CPOL=0, CPHA=0)
C remains at 1 for (CPOL=1, CPHA=1)
S
SPI Memory
C Q D
5., is the clock polarity when the bus
Device
W
MSB
RP
S
SPI Memory
C Q D
Device
W
AI04043B
RP
AI01438B

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