M45PE10-VMN6 STMICROELECTRONICS [STMicroelectronics], M45PE10-VMN6 Datasheet - Page 11

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M45PE10-VMN6

Manufacturer Part Number
M45PE10-VMN6
Description
1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Write Enable (WREN)
The Write Enable (WREN) instruction
sets the Write Enable Latch (WEL) bit.
The Write Enable Latch (WEL) bit must be set pri-
or to every Page Write (PW), Page Program (PP),
Figure 7. Write Enable (WREN) Instruction Sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction
resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by
driving Chip Select (S) Low, sending the instruc-
tion code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under
the following conditions:
Figure 8. Write Disable (WRDI) Instruction Sequence
S
C
D
Q
S
C
D
Q
(Figure
(Figure
High Impedance
0
High Impedance
0
1
1
7.)
8.)
2
2
Instruction
Instruction
3
3
4
Page Erase (PE), and Sector Erase (SE) instruc-
tion.
The Write Enable (WREN) instruction is entered
by driving Chip Select (S) Low, sending the in-
struction code, and then driving Chip Select (S)
High.
4
5
5
Power-up
Write Disable (WRDI) instruction completion
Page Write (PW) instruction completion
Page Program (PP) instruction completion
Page Erase (PE) instruction completion
Sector Erase (SE) instruction completion
6
6
7
7
AI02281E
AI03750D
M45PE10
11/34

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