M45PE10-VMN6 STMICROELECTRONICS [STMicroelectronics], M45PE10-VMN6 Datasheet - Page 13

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M45PE10-VMN6

Manufacturer Part Number
M45PE10-VMN6
Description
1 Mbit, Low Voltage, Page-Erasable Serial Flash Memory With Byte-Alterability and a 25 MHz SPI Bus Interface
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Read Status Register (RDSR)
The Read Status Register (RDSR) instruction al-
lows the Status Register to be read. The Status
Register may be read at any time, even while a
Program, Erase or Write cycle is in progress.
When one of these cycles is in progress, it is rec-
ommended to check the Write In Progress (WIP)
bit before sending a new instruction to the device.
It is also possible to read the Status Register con-
tinuously, as shown in
The status bits of the Status Register are as fol-
lows:
Figure 10. Read Status Register (RDSR) Instruction Sequence and Data-Out Sequence
S
C
D
Q
0
High Impedance
Figure 10.
1
2
Instruction
3
4
5
6
7
MSB
7
8
6
Status Register Out
9 10 11 12 13 14 15
5
4
3
WIP bit. The Write In Progress (WIP) bit indicates
whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in
progress, when reset to 0 no such cycle is in
progress.
WEL bit. The Write Enable Latch (WEL) bit indi-
cates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is
set, when set to 0 the internal Write Enable Latch
is reset and no Write, Program or Erase instruction
is accepted.
2
1
0
MSB
7
6
Status Register Out
5
4
3
2
1
0
7
AI02031E
M45PE10
13/34

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