MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 260

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
Monitor ROM (MON)
18.7 Data Format
18.8 Break Signal
Technical Data
260
Table 18-2
mode.
The MCU waits for the host to send eight security bytes
(see
signal (10 consecutive logic 0s) to the host computer, indicating that it is
ready to receive a command.
Communication with the monitor ROM is in standard non-return-to-zero
(NRZ) mark/space data format. Transmit and receive baud rates must
be identical.
A start bit (logic 0) followed by nine logic 0 bits is a break signal. When
the monitor receives a break signal, it drives the PTA0 pin high for the
duration of two bits and then echoes back the break signal.
Monitor
Modes
User
START
18.11
BIT
0
BIT 0
1
Security). After the security bytes, the MCU sends a break
shows vector differences between user mode and monitor
Reset Vector
Table 18-2. Monitor Mode Vector Relocation
2
$FFFE
$FEFE
Monitor ROM (MON)
High
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
BIT 1
3
MISSING STOP BIT
Figure 18-2. Monitor Data Format
Figure 18-3. Break Transaction
4
BIT 2
5
6
BIT 3
Reset Vector
7
$FFFF
$FEFF
Low
BIT 4
BIT 5
2-STOP BIT DELAY BEFORE ZERO ECHO
SWI Vector
BIT 6
0
$FFFC
$FEFC
High
1
BIT 7
2
3
STOP
BIT
4
SWI Vector
START
NEXT
5
BIT
MOTOROLA
$FEFD
$FFFD
Low
6
7

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