MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 241
MC68HC908KX2
Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908KX2.pdf
(311 pages)
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MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
NOTE:
NOTE:
Before changing a channel function by writing to the MS0B or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
Before enabling a TIM channel register for input capture operation, make
sure that the PTAx/TCHx pin is stable for at least two bus clocks.
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port A, and pin PTAx/TCHx is available as a general-purpose I/O
pin.
ELSxB and ELSxA bits.
MSxB:MSxA ELSxB:ELSxA
Table 16-2
X0
X1
1X
1X
1X
00
00
00
01
01
01
Timer Interface Module (TIM)
Table 16-2. Mode, Edge, and Level Selection
shows how ELSxB and ELSxA work. Reset clears the
00
00
01
10
01
10
01
10
11
11
11
Buffered output
buffered PWM
Output preset
Input capture
compare or
compare or
Output
Mode
PWM
Pin under port control;
Pin under port control;
Capture on rising edge only
Capture on falling edge only
Capture on rising or
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Timer Interface Module (TIM)
initial output level high
initial output level low
falling edge
Configuration
Technical Data
I/O Registers
241
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