MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 131

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MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
7.8.1 ICG Control Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Address: $0036
Reset:
Read:
Write:
The ICG control register (ICGCR) contains the control and status bits for
the internal clock generator, external clock generator, and clock monitor
as well as the clock select and interrupt enable bits.
CMIE — Clock Monitor Interrupt Enable Bit
CMF — Clock Monitor Interrupt Flag
CMON — Clock Monitor On Bit
This read/write bit enables clock monitor interrupts. An interrupt will
occur when both CMIE and CMF are set. CMIE can be set when the
CMON bit has been set for at least one cycle. CMIE is forced clear
when CMON is clear or during reset.
This read-only bit is set when the clock monitor determines that either
ICLK or ECLK becomes inactive and the CMON bit is set. This bit is
cleared by first reading the bit while it is set, followed by writing the bit
low. This bit is forced clear when CMON is clear or during reset.
This read/write bit enables the clock monitor. CMON can be set when
both ICLK and ECLK have been on and stable for at least one bus
cycle. (ICGON, ECGON, ICGS, and ECGS are all set.) CMON is
*See CMF bit description for method of clearing CMF bit.
1 = Clock monitor interrupts enabled
0 = Clock monitor interrupts disabled
1 = Either ICLK or ECLK has become inactive.
0 = ICLK and ECLK have not become inactive since the last read
CMIE
Bit 7
0
Internal Clock Generator Module (ICG)
of the ICGCR, or the clock monitor is disabled.
Figure 7-11. ICG Control Register (ICGCR)
= Unimplemented
CMF
0*
6
0
CMON
5
0
CS
4
0
Internal Clock Generator Module (ICG)
ICGON
3
1
Input/Output (I/O) Registers
ICGS
2
0
ECGON
1
0
Technical Data
ECGS
Bit 0
0
131

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