MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 133

no-image

MC68HC908KX2

Manufacturer Part Number
MC68HC908KX2
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
7.8.2 ICG Multiplier Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Address: $0037
Reset:
Read:
Write:
ECGON — External Clock Generator On Bit
ECGS — External Clock Generator Stable Bit
N6:N0 — ICG Multiplier Factor Bits
This read/write bit enables the external clock generator. ECGON can
be cleared when the CS and CMON bits have been clear for at least
one bus cycle. ECGON is forced set when the CMON bit or the CS bit
is set. ECGON is forced clear during reset.
This read-only bit indicates when at least 4096 external clock (ECLK)
cycles have elapsed since the external clock generator was enabled.
This is not an assurance of the stability of ECLK but is meant to
provide a startup delay. This bit is forced clear when the clock monitor
determines ECLK is inactive, when ECGON is clear, during stop
mode with OSCENINSTOP low, or during reset.
These read/write bits change the multiplier used by the internal clock
generator. The internal clock (ICLK) will be:
A value of $00 in this register is interpreted the same as a value of
$01. This register cannot be written when the CMON bit is set. Reset
sets this factor to $15 (decimal 21) for default frequency of 6.45 MHz
25 percent (1.613 MHz
1 = External clock generator enabled
0 = External clock generator disabled
1 = 4096 ECLK cycles have elapsed since ECGON was set.
0 = External clock is unstable, inactive, or disabled.
Bit 7
0
Internal Clock Generator Module (ICG)
Figure 7-12. ICG Multiplier Register (ICGMR)
(307.2 kHz
= Unimplemented
N6
6
0
N5
25 percent) * N
5
0
25 percent bus).
N4
4
1
Internal Clock Generator Module (ICG)
N3
3
0
Input/Output (I/O) Registers
N2
2
1
N1
1
0
Technical Data
Bit 0
N0
1
133

Related parts for MC68HC908KX2