MC68HC908KX2 MOTOROLA [Motorola, Inc], MC68HC908KX2 Datasheet - Page 253

• Manufacturer Part Number: MC68HC908KX2
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

17.8.2 ADC Data Register
17.8.3 ADC Input Clock Register
MC68HC908KX8 • MC68HC908KX2 • MC68HC08KX8 — Rev. 1.0
MOTOROLA
Address:
Address:
One 8-bit result register is provided. This register is updated each time
an ADC conversion completes.
This register selects the clock frequency for the ADC.
ADIV2–ADIV0 — ADC Clock Prescaler Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
ADIV2, ADIV1, and ADIV0 form a 3-bit field which selects the divide
ratio used by the ADC to generate the internal ADC clock.
Table 17-2
should be set to approximately 1 MHz.
$003D
$003E
ADIV2
Bit 7
AD7
Bit 7
Figure 17-4. ADC Input Clock Register (ADICLK)
Analog-to-Digital Converter (ADC)
R
R
0
shows the available clock configurations. The ADC clock
Figure 17-3. ADC Data Register (ADR)
= Reserved
= Unimplemented
ADIV1
AD6
6
R
6
0
ADIV0
AD5
R
5
5
0
Indeterminate after reset
ADICLK
AD4
R
4
4
0
AD3
R
R
3
3
0
0
Analog-to-Digital Converter (ADC)
= Reserved
AD2
R
2
2
0
0
AD1
R
1
1
0
0
Technical Data
I/O Registers
Bit 0
Bit 0
AD0
R
R
0
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