LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 98
LPC47N237-MD
Manufacturer Part Number
LPC47N237-MD
Description
3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LPC47N237-MD.pdf
(138 pages)
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17.4.8 CR08
17.4.9 CR09
Note :
17.4.10 CR0A
Revision 0.3 (10-26-04)
This register is reserved, read only, and returns 0 when read.
CR09 can only be accessed in the configuration state and after the CSR has been initialized to 09H. CR09
is a test control register and all bits must be treated as Reserved.
All test modes are reserved for SMSC use. Activating test mode registers may produce undesired results.
CR0A can only be accessed in the configuration state and after the CSR has been initialized to 0AH.
CR0A defines the FIFO threshold for the ECP mode parallel port.
BIT NO.
BIT NO.
0-3
4
5
6
7
0
1
2
3
4
5
6
7
Reserved
Parallel Port
Enable
Reserved
UART Enable
Reserved
Type: R/W
Type: R/W
BIT NAME
BIT NAME
Test 24
Test 25
Test 26
Test 27
Test 28
Test 29
Test 30
Test 31
Read Only. A read returns 0.
This bit controls the AUTOPOWER DOWN feature of the Parallel
Port. The function is:
0 = Auto powerdown disabled (default)
1 = Auto powerdown enabled
This bit is reset to the default state by POR or a hardware reset.
Read Only. A read returns 0.
This bit controls the AUTOPOWER DOWN feature of the UART.
The function is:
0 = Auto powerdown disabled (default)
1 = Auto powerdown enabled
This bit is reset to the default state by POR or a hardware reset.
Read Only. A read returns 0.
DATASHEET
Auto Power Management
Table 17.7 – CR07
Table 17.8 – CR09
Test 4
Page 98
RESERVED FOR SMSC USE
Bits[7:4] = 0000 on HARD RESET
DESCRIPTION
DESCRIPTION
3.3v I/O Controller for Port Replicators and Docking Stations
Default: 0x00 on VCC POR;
Default: 0x00 on VCC POR
SMSC DS – LPC47N237
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