LPC47N237-MD SMSC [SMSC Corporation], LPC47N237-MD Datasheet - Page 81

• Manufacturer Part Number: LPC47N237-MD
• Description: 3.3V I/O CONTROLLER FOR PORT REPLICATORS AND DOCKING STATIONS
• Manufacturer: SMSC [SMSC Corporation]

3.3v I/O Controller for Port Replicators and Docking Stations
15.1.4 Invalid Protocol Response Behavior
15.1.5 General Call Address Response
15.1.6 Slave Device Time-Out
15.1.7 Stretching the SCLK Signal
15.1.8 SMBus Timing
15.1.9 Bus Reset Sequence
SMSC DS – LPC47N237
The LPC47N237 slave address is determined by the level on the SMB_A0 pin on a VTR POR. The level
on this pin forms the LSB of the 7-bit address 010010x, where x is the state of the SMB_A0 on VTR POR.
This pin may be used to support up to 2 of these devices in a given system.
The upper 6 bits of the LPC47N237’s slave address are hardwired in the LPC47N237.
Registers that are accessed with an invalid protocol will not be updated. A register will only be updated
following a valid protocol. The only valid protocols are the read byte, receive byte and write byte protocols
described above.
The only valid slave address is determined by the level on the SMB_A0 pin as the LSB of the address
010010x.
The only valid registers for a read or write protocol are the registers shown in the Registers Section.
Reserved registers are not considered valid registers.
Attempting to communicate with the LPC47N237 over SMBus with an invalid slave address, invalid register
address or invalid protocol will result in no response, and the SMBus Slave Interface will return to the idle
state.
The LPC47N237 will not respond to a general call address of 0000 000.
The device will time-out when SCLK is held low for 25ms-35ms. The SMBus slave interface resets and
returns to idle by 35msec.
The LPC47N237 supports stretching of the SCLK by other devices on the SMBus. The LPC47N237 does
not stretch the SCLK.
The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing in
Timing Diagrams” section.
The SMBus Slave Interface will reset and return to the idle state upon a START field followed immediately
by a STOP field.
DATASHEET
Page 81
Revision 0.3 (10-26-04)