FDC37B787QF SMSC [SMSC Corporation], FDC37B787QF Datasheet - Page 66

• Manufacturer Part Number: FDC37B787QF
• Description: Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR
• Manufacturer: SMSC [SMSC Corporation]

The choice of DMA or non-DMA operations is
made by the ND bit. When this bit is "1", the non-
DMA mode is selected, and when ND is "0", the
DMA mode is selected.
transfers are signaled by the FDRQ pin. Non-DMA
mode uses the RQM bit and the FINT pin to signal
data transfers.
Configure
The Configure command is issued to select the
special features of the FDC.
command need not be issued if the default values
of the FDC meet the system requirements.
Configure Default Values:
EIS - No Implied Seeks
EFIFO - FIFO Disabled
POLL - Polling Enabled
FIFOTHR - FIFO Threshold Set to 1 Byte
PRETRK - Pre-Compensation Set to Track 0
EIS - Enable Implied Seek. When set to "1", the
FDC will perform a Seek operation before
executing a read or write command. Defaults to
no implied seek.
EFIFO - A "1" disables the FIFO (default). This
means data transfers are asked for on a byte-by-
byte basis. Defaults to "1", FIFO disabled. The
threshold defaults to "1".
POLL - Disable polling of the drives. Defaults to
"0", polling enabled.
interrupt is generated after a reset. No polling is
7F
7F
00
01
02
E
..
F
..
56
60
..
63.5
2M
0.5
64
63
1
..
When enabled, a single
112
120
..
In DMA mode, data
224
240
..
A Configure
128
126
127
1M
1
2
..
373
400
..
448
480
..
67
500K
256
252
254
2
4
..
performed while the drive head is loaded and the
head unload delay has not expired.
FIFOTHR - The FIFO threshold in the execution
phase of read or write commands. This is
programmable from 1 to 16 bytes. Defaults to one
byte. A "00" selects one byte; "0F" selects 16
bytes.
PRETRK
Number.
Defaults to track 0. A "00" selects track 0; "FF"
selects track 255.
0.25
0.5
..
HLT
0.5
Programmable from track 0 to 255.
..
1
-
300K
426
420
423
3.3
6.7
Pre-Compensation
..
..
2
1
3.33
1.67
..
250K
512
504
508
4
8
.
..
4
2
Start
Track