FDC37B787QF SMSC [SMSC Corporation], FDC37B787QF Datasheet - Page 162

• Manufacturer Part Number: FDC37B787QF
• Description: Super I/O Controller with ACPI Support, Real Time Clock and Consumer IR
• Manufacturer: SMSC [SMSC Corporation]

SMI Enable Register 1 (SMI_EN1)
Register Location: < PM1_BLK >+14h System I/O Space
Default Value: 00h on Vbat POR
Attribute: Read/Write
Size: 8-bits
SMI Enable Register
1
Default = 0x00
on Vbat POR
NAME
This register is used to enable the different interrupt sources onto the group
nSMI output.
1=Enable
0=Disable
Bit[0] EN_RING
Note: the PME status bit for RING is used as the SMI status bit for RING
(see PME Status Register).
Bit[1] EN_PINT
Bit[2] EN_U2INT
Bit[3] EN_U1INT
Bit[4] EN_FINT
Bit[5] EN_GPINT2
Bit[6] EN_GPINT1
Bit[7] EN_WDT
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DESCRIPTION