LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 427

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LAN9311i

Manufacturer Part Number
LAN9311i
Description
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.5.4.15
31:26
25:13
BITS
12:0
RESERVED
Egress Rate Port 0 Priority Queue 3
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 3. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
Egress Rate Port 0 Priority Queue 2
These bits specify the egress data rate for the Port 0(Host MAC) priority
queue 2. The rate is specified in time per byte. The time is this value plus
1 times 20nS.
Buffer Manager Port 0 Egress Rate Priority Queue 2/3 Register (BM_EGRSS_RATE_02_03)
This register, along with the
the egress rate pacing.
Register #:
1C0Eh
DESCRIPTION
Buffer Manager Configuration Register
DATASHEET
427
Size:
32 bits
(BM_CFG), is used to configure
TYPE
R/W
R/W
RO
Revision 1.6 (08-18-09)
DEFAULT
00000h
00000h
-

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