LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 187

• Manufacturer Part Number: LAN9311i
• Description: Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
• Manufacturer: SMSC [SMSC Corporation]

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.2.6
BITS
31:0
RX Dropped Frame Counter (RX_DFC)
This counter is incremented every time a receive frame is dropped by the
Host MAC. RX_DFC is cleared on any read of this register.
Note:
Host MAC RX Dropped Frames Counter Register (RX_DROP)
This register indicates the number of receive frames that have been dropped by the Host MAC.
The interrupt RXDFH_INT (bit 23 of the
(INT_STS)) can be issued when this counter passes through its
halfway point (7FFFFFFFh to 80000000h).
Offset:
0A0h
DESCRIPTION
DATASHEET
187
Interrupt Status Register
Size:
32 bits
TYPE
RC
Revision 1.6 (08-18-09)
00000000h
DEFAULT