LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 137

• Manufacturer Part Number: LAN9311i
• Description: Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
• Manufacturer: SMSC [SMSC Corporation]

Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
9.9.4
9.9.5
Stopping and Starting the Receiver
To stop the receiver, the host must clear the RXEN bit in the
When the receiver is halted, the RXSTOP_INT will be pulsed and reflected in the
Register
The host must re-enable the receiver by setting the RXEN bit.
Receiver Errors
If the Receiver Error (RXE) flag is asserted in the
the receiver will continue operation. RX Error (RXE) will be asserted under the following conditions:
It is the duty of the host to identify and resolve any error conditions.
A host underrun of RX Data FIFO
A host underrun of the RX Status FIFO
An overrun of the RX Status FIFO
(INT_STS). Once stopped, the host can optionally clear the RX Status and RX Data FIFOs.
DATASHEET
137
Interrupt Status Register (INT_STS)
Host MAC Control Register
Revision 1.6 (08-18-09)
Interrupt Status
for any reason,
(HMAC_CR).