LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 414

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LAN9311i

Manufacturer Part Number
LAN9311i
Description
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Revision 1.6 (08-18-09)
14.5.4.3
31:16
BITS
15:8
7:0
RESERVED
Pause Level Low
These bits specify the buffer usage level during times when 2 or 3 ports are
active.
Each buffer is 128 bytes.
Note:
Pause Level High
These bits specify the buffer usage level during times when 1 port is active.
Each buffer is 128 bytes.
Note:
Buffer Manager Flow Control Pause Level Register (BM_FC_PAUSE_LVL)
This register configures the buffer usage level when a Pause frame or backpressure is sent.
A port is “active” when 36 buffers are in use for that port.
A port is “active” when 36 buffers are in use for that port.
Register #:
1C02h
DESCRIPTION
DATASHEET
414
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
32 bits
TYPE
R/W
R/W
SMSC LAN9311/LAN9311i
RO
DEFAULT
3Ch
21h
Datasheet
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