LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 348

• Manufacturer Part Number: LAN9311i
• Description: Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.6 (08-18-09)
14.5.2.25
BITS
31:0
TX Deferred
Count of packets that were available for transmission but were deferred on
the first transmit attempt due to network traffic (either on receive or prior
transmission). This counter is not incremented on collisions. This counter is
incremented only in half-duplex operation.
Note:
Port x MAC Transmit Deferred Count Register (MAC_TX_DEFER_CNT_x)
This register provides a counter deferred packets. The counter is cleared upon being read.
This counter will stop at its maximum value of FFFF_FFFFh.
Minimum rollover time at 100Mbps is approximately 481 hours.
Register #:
Port0: 0451h
Port1: 0851h
Port2: 0C51h
DESCRIPTION
DATASHEET
348
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
32 bits
TYPE
SMSC LAN9311/LAN9311i
RC
00000000h
DEFAULT
Datasheet