LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 239
LAN9311i
Manufacturer Part Number
LAN9311i
Description
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN9311I.pdf
(459 pages)
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Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9311/LAN9311i
14.2.6.6
31:16
BITS
15:0
RESERVED
Physical Address[47:32]
This field contains the upper 16-bits (47:32) of the physical address of the
Switch Fabric MACs.
Switch Fabric MAC Address High Register (SWITCH_MAC_ADDRH)
This register contains the upper 16-bits of the MAC address used by the switch for Pause frames. This
r e g i s t e r i s u s e d i n c o n j u n c t i o n w i t h
(SWITCH_MAC_ADDRL). The contents of this register are optionally loaded from the EEPROM at
power-on through the EEPROM Loader if a programmed EEPROM is detected. The least significant
byte of this register (bits [7:0]) is loaded from address 05h of the EEPROM. The second byte (bits
[15:8]) is loaded from address 06h of the EEPROM. These EEPROM values are also loaded into the
Host MAC Address High Register
after the initialization process has completed.
Refer to
this register.
EEPROM Loader.
Offset:
Section 9.6, "Host MAC Address," on page 120
Section 10.2.4, "EEPROM Loader," on page 150
1F0h
DESCRIPTION
DATASHEET
(HMAC_ADDRH). The Host can update the contents of this field
239
Size:
S w i t c h F a b r i c M A C A d d r e s s L o w R e g i s t e r
for details on how the EEPROM Loader loads
contains additional details on using the
32 bits
TYPE
R/W
RO
Revision 1.6 (08-18-09)
DEFAULT
FFFFh
-
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