LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 266

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LAN9311i

Manufacturer Part Number
LAN9311i
Description
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Manufacturer
SMSC [SMSC Corporation]
Datasheet

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Revision 1.6 (08-18-09)
BITS
0
Device Ready (READY)
When set, this bit indicates that the LAN9311/LAN9311i is ready to be
accessed. Upon power-up, nRST reset, soft reset, or digital reset, the host
processor may interrogate this field as an indication that the
LAN9311/LAN9311i has stabilized and is fully active.
This bit can cause an interrupt if enabled.
Note:
Note:
With the exception of the HW_CFG, PMT_CTRL, BYTE_TEST, and
RESET_CTL registers, read access to any internal resources is
forbidden while the READY bit is cleared. Writes to any address
are invalid until this bit is set.
This bit is identical to bit 27 of the
(HW_CFG)
DESCRIPTION
DATASHEET
Hardware Configuration Register
266
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
TYPE
SMSC LAN9311/LAN9311i
RO
DEFAULT
Datasheet
0b

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