LAN9311i SMSC [SMSC Corporation], LAN9311i Datasheet - Page 382

• Manufacturer Part Number: LAN9311i
• Description: Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.6 (08-18-09)
14.5.3.13
BITS
31:3
2:0
RESERVED
DIFFSERV Priority
These bits specify the assigned receive priority for IP packets with a ToS/CS
field that matches this index.
Switch Engine DIFFSERV Table Write Data Register (SWE_DIFFSERV_TBL_WR_DATA)
This register is used to write the DIFFSERV table. The DIFFSERV table is not initialized upon reset
on power-up. If DIFFSERV is enabled, the full table should be initialized by the host.
Register #:
1812h
DESCRIPTION
DATASHEET
382
Two Port 10/100 Managed Ethernet Switch with 16-Bit Non-PCI CPU Interface
Size:
32 bits
TYPE
R/W
SMSC LAN9311/LAN9311i
RO
DEFAULT
000b
Datasheet
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