PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 396

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PIC18F25J11-I/PT

Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F46J11 FAMILY
REGISTER 25-6:
REGISTER 25-7:
DS39932C-page 396
bit 7
Legend:
R = Readable bit
-n = Value at Reset
bit 7-4
bit 3
bit 2-1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at Reset
bit 7
bit 6
bit 5-0
Note 1:
WPCFG
R/WO-1
U-1
2:
3:
The “Configuration Words page” contains the FCWs and is the last page of implemented Flash memory on
a given device. Each page consists of 1,024 bytes. For example, on a device with 64 Kbytes of Flash, the
first page is 0 and the last page (Configuration Words page) is 63 (3Fh).
Not available on 32K devices.
Not available on 32K and 16K devices.
Unimplemented: Program the corresponding Flash Configuration bit to ‘1’
MSSPMSK: MSSP 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode enabled
0 = 5-Bit Address Masking mode enabled
Unimplemented: Read as ‘0’
IOL1WAY: IOLOCK One-Way Set Enable bit
1 = IOLOCK bit (PPSCON<0>) can be set once, provided the unlock sequence has been completed.
0 = IOLOCK bit (PPSCON<0>) can be set and cleared as needed, provided the unlock sequence has
WPCFG: Write/Erase Protect Configuration Region Select bit (valid when WPDIS = 0)
1 = Configuration Words page is not erase/write-protected, regardless of WPEND and WPFP<5:0>
0 = Configuration Words page is erase/write-protected, regardless of WPEND and WPFP<5:0>
WPEND: Write/Erase Protect Region Select bit (valid when WPDIS = 0)
1 = Flash pages WPFP<5:0> to (Configuration Words page) are write/erase protected
0 = Flash pages 0 to WPFP<5:0> are erase/write-protected
WPFP<5:0>: Write/Erase Protect Page Start/End Location bits
Used with WPEND bit to define which pages in Flash will be erase/write-protected.
WPEND
R/WO-1
Once set, the Peripheral Pin Select registers cannot be written to a second time.
been completed
settings
U-1
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
(1)
WO = Write-Once bit
‘1’ = Bit is set
WO = Write-Once bit
‘1’ = Bit is set
WPFP5
R/WO-1
U-1
(2)
WPFP4
R/WO-1
U-1
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
MSSPMSK
R/WO-1
R/WO-1
WPFP3
R/WO-1
WPFP2
U-0
(2,3)
© 2009 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
R/WO-1
WPFP1
U-0
IOL1WAY
R/WO-1
R/WO-1
WPFP0
(1)
bit 0
bit 0

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