PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 149

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PIC18F25J11-I/PT

Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
9.7.6
The PIC18F46J11 family of devices implements a total
of 37 registers for remappable peripheral configuration
of 44-pin devices. The 28-pin devices have 31 registers
for remappable peripheral configuration.
REGISTER 9-5:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-1
bit 0
Note 1:
U-0
Register values can only be changed if PPSCON<IOLOCK> = 0.
PERIPHERAL PIN SELECT
REGISTERS
Unimplemented: Read as ‘0’
IOLOCK: I/O Lock Enable bit
1 = I/O lock active, RPORx and RPINRx registers are write-protected
0 = I/O lock not active, pin configurations can be changed
U-0
PPSCON: PERIPHERAL PIN SELECT INPUT REGISTER 0 (BANKED EFFh)
W = Writable bit
‘1’ = Bit is set
U-0
U-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J11 FAMILY
U-0
Note:
Input and output register values can only
be changed if PPS<IOLOCK> = 0. See
Example 9-7 for a specific command
sequence.
U-0
x = Bit is unknown
U-0
DS39932C-page 149
IOLOCK
R/W-0
(1)
bit 0

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