PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 209
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PIC18F25J11-I/PT
Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F25J11-IPT.pdf
(528 pages)
- Current page: 209 of 528
- Download datasheet (9Mb)
14.0
The Timer3 timer/counter module incorporates these
features:
• Software selectable operation as a 16-bit timer or
• Readable and writable 8-bit registers (TMR3H
• Selectable clock source (internal or external) with
• Interrupt-on-overflow
• Module Reset on ECCP Special Event Trigger
REGISTER 14-1:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3
bit 2
bit 1
bit 0
Note 1:
TMR3CS1
counter
and TMR3L)
device clock or Timer1 oscillator internal options
R/W-0
TIMER3 MODULE
The F
features.
TMR3CS<1:0>: Timer3 Clock Source Select bits
10 = Timer3 clock source is
01 = Timer3 clock source is the system clock (F
00 = Timer3 clock source is the instruction clock (F
T3CKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:8 Prescale value
10 = 1:4 Prescale value
01 = 1:2 Prescale value
00 = 1:1 Prescale value
Reserved: Program as ‘0’
T3SYNC: Timer3 External Clock Input Synchronization Control bit
When TMR3CS<1:0> = 10:
1 = Do not synchronize external clock input
0 = Synchronize external clock input
When TMR3CS<1:0> = 0x:
This bit is ignored; Timer3 uses the internal clock.
RD16: 16-Bit Read/Write Mode Enable bit
1 = Enables register read/write of Timer3 in one 16-bit operation
0 = Enables register read/write of Timer3 in two 8-bit operations
TMR3ON: Timer3 On bit
1 = Enables Timer3
0 = Stops Timer3
TMR3CS0
OSC
R/W-0
clock source should not be selected if the timer will be used with the ECCP capture/compare
T3CON: TIMER3 CONTROL REGISTER (ACCESS F79h)
W = Writable bit
‘1’ = Bit is set
T3CKPS1
R/W-0
th
e T3CKI input pin (assigned in the PPS module)
T3CKPS0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J11 FAMILY
A simplified block diagram of the Timer3 module is
shown in Figure 14-1.
The Timer3 module is controlled through the T3CON
register (Register 14-1). It also selects the clock source
options for the ECCP modules; see Section 17.1.1
“ECCP Module and Timer Resources” for more
information.
The F
not be used with the ECCP capture/compare features.
If the timer will be used with the capture or compare
features, always select one of the other timer clocking
options.
OSC
U-0
—
OSC
)
(1)
OSC
/4)
clock source (TMR3CS<1:0> = 01) should
T3SYNC
R/W-0
x = Bit is unknown
R/W-0
RD16
DS39932C-page 209
TMR3ON
R/W-0
bit 0
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