PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 107

• Manufacturer Part Number: PIC18F25J11-I/PT
• Description: 28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

7.0
7.1
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows the PIC18 devices to be used in many applica-
tions previously reserved for digital signal processors.
Table 7-1 provides a comparison of various hardware
and software multiply operations, along with the
savings in memory and execution time.
7.2
Example 7-1 provides the instruction sequence for an
8 x 8 unsigned multiplication. Only one instruction is
required when one of the arguments is already loaded
in the WREG register.
Example 7-2 provides the instruction sequence for an
8 x 8 signed multiplication. To account for the sign bits
of the arguments, each argument’s Most Significant bit
(MSb) is tested and the appropriate subtractions are
done.
TABLE 7-1:
© 2009 Microchip Technology Inc.
16 x 16 unsigned
8 x 8 unsigned
16 x 16 signed
8 x 8 signed
Routine
8 x 8 HARDWARE MULTIPLIER
Introduction
Operation
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
Without hardware multiply
Without hardware multiply
Without hardware multiply
Without hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Hardware multiply
Multiply Method
Program
Memory
(Words)
13
33
21
28
52
35
1
6
PIC18F46J11 FAMILY
EXAMPLE 7-1:
EXAMPLE 7-2:
MOVF
MULWF
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
Cycles
(Max)
242
254
69
91
28
40
1
6
ARG1, W
ARG2
ARG1, W
ARG2
ARG2, SB
PRODH, F
ARG2, W
ARG1, SB
PRODH, F
@ 48 MHz
20.1 μs
21.6 μs
83.3 ns
500 ns
5.7 μs
7.5 μs
2.3 μs
3.3 μs
8 x 8 UNSIGNED MULTIPLY
ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
@ 10 MHz
102.6 μs
27.6 μs
36.4 μs
96.8 μs
16.0 μs
11.2 μs
Time
400 ns
2.4 μs
DS39932C-page 107
- ARG1
- ARG2
@ 4 MHz
242 μs
254 μs
69 μs
91 μs
28 μs
40 μs
1 μs
6 μs