PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 167

• Manufacturer Part Number: PIC18F25J11-I/PT
• Description: 28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
• Manufacturer: MICROCHIP [Microchip Technology]

REGISTER 10-2:
© 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
R/W-0
CSF1
2:
This register is only available in 44-pin devices.
These bits have no effect when their corresponding pins are used as address lines.
CSF<1:0>: Chip Select Function bits
11 = Reserved
10 = Chip select function is enabled and PMCS1 acts as chip select (in Master mode). Up to
01 = Reserved
00 = Chip select function is disabled (in Master mode). All 16 address bits can be generated.
ALP: Address Latch Polarity bit
1 = Active-high (PMALL and PMALH)
0 = Active-low (PMALL and PMALH)
Unimplemented: Maintain as ‘0’
CS1P: Chip Select Polarity bit
1 = Active-high (PMCS)
0 = Active-low (PMCS)
BEP: Byte Enable Polarity bit
1 = Byte enable active-high (PMBE)
0 = Byte enable active-low (PMBE)
WRSP: Write Strobe Polarity bit
For Slave modes and Master Mode 2 (PMMODEH<1:0> = 00,01,10):
1 = Write strobe active-high (PMWR)
0 = Write strobe active-low (PMWR)
For Master Mode 1 (PMMODEH<1:0> = 11):
1 = Enable strobe active-high (PMENB)
0 = Enable strobe active-low (PMENB)
RDSP: Read Strobe Polarity bit
For Slave modes and Master Mode 2 (PMMODEH<1:0> = 00,01,10):
1 = Read strobe active-high (PMRD)
0 = Read strobe active-low (PMRD)
For Master Mode 1 (PMMODEH<1:0> = 11):
1 = Read/write strobe active-high (PMRD/PMWR)
0 = Read/write strobe active-low (PMRD/PMWR)
R/W-0
CSF0
13 address bits only can be generated.
PMCONL: PARALLEL PORT CONTROL REGISTER LOW BYTE (BANKED F5Eh)
W = Writable bit
‘1’ = Bit is set
R/W-0
ALP
(2)
(2)
(2)
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F46J11 FAMILY
R/W-0
CS1P
(2)
R/W-0
BEP
x = Bit is unknown
WRSP
R/W-0
DS39932C-page 167
R/W-0
RDSP
bit 0
(1)