PIC18F25J11-I/PT MICROCHIP [Microchip Technology], PIC18F25J11-I/PT Datasheet - Page 348

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PIC18F25J11-I/PT

Manufacturer Part Number
PIC18F25J11-I/PT
Description
28/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC18F46J11 FAMILY
The analog reference voltage is software select-
able to either the device’s positive and negative
supply voltage (AV
level
RA2/AN2/V
The A/D Converter has a unique feature of being able
to operate while the device is in Sleep mode. To
operate in Sleep, the A/D conversion clock must be
derived from the A/D’s internal RC oscillator.
The output of the sample and hold is the input into the
Converter, which generates the result via successive
approximation.
FIGURE 20-1:
DS39932C-page 348
Note 1: Channels AN5, AN6 and AN7 are not available on 28-pin devices.
on
REF
Converter
2: I/O pins have diode protection to V
the
-/CV
10-Bit
A/D
Reference
REF
DD
Voltage
RA3/AN3/V
A/D BLOCK DIAGRAM
/C2INB pins.
and AV
SS
REF
), or the voltage
V
+/C1INB
V
REF
REF
+
-
(Input Voltage)
VCFG<1:0>
V
DD
AIN
and
and V
SS
V
.
DD
V
(2)
SS (2)
Each port pin associated with the A/D Converter can be
configured as an analog input or as a digital I/O. The
ADRESH and ADRESL registers contain the result of
the A/D conversion. When the A/D conversion is com-
plete, the result is loaded into the ADRESH:ADRESL
register pair, the GO/DONE bit (ADCON0<1>) is
cleared and the A/D Interrupt Flag bit, ADIF, is set.
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion in progress is aborted. The value in the
ADRESH:ADRESL register pair is not modified for a
Power-on Reset (POR). These registers will contain
unknown data after a POR.
Figure 20-1 provides the block diagram of the A/D module.
CHS<3:0>
1111
1110
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
© 2009 Microchip Technology Inc.
V
V
AN12
AN11
AN10
AN9
AN8
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
BG
DDCORE
(1)
(1)
(1)
/V
CAP

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