ADAU1373BCBZ-RL AD [Analog Devices], ADAU1373BCBZ-RL Datasheet - Page 72

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ADAU1373BCBZ-RL

Manufacturer Part Number
ADAU1373BCBZ-RL
Description
Low Power Codec with Speaker and Headphone Amplifier
Manufacturer
AD [Analog Devices]
Datasheet
ADAU1373
I
Figure 119 shows the format of a single-word write operation.
Every ninth clock pulse, the ADAU1373 issues an acknowledge
by pulling SDA low.
Figure 120 shows the format of a burst mode write sequence. This
figure shows an example of a write to sequential single-byte
registers. The ADAU1373 increments its subaddress register
after every byte because the requested subaddress corresponds
to a register or memory area with a 1-byte word length.
Figure 121 shows the format of a single-word read operation.
Note that the first R/ W bit is set to 0, indicating a write
operation. This is because the subaddress still needs to be
written to set up the internal address. After the ADAU1373
acknowledges the receipt of the subaddress, the master must issue
a repeated start command, followed by the chip address byte with
the R/ W bit set to 1 (read). This causes the ADAU1373 SDA to
reverse and begin driving data back to the master. The master
then responds every ninth pulse with an acknowledge pulse to
the ADAU1373.
2
C Read and Write Operations
S
DEVICE ADDRESS,
R/W = 0
S
S
DEVICE ADDRESS,
R/W = 0
DEVICE ADDRESS,
R/W = 0
AS
S
REGISTER ADDRESS
DEVICE ADDRESS,
R/W = 0
AS
AS
REGISTER ADDRESS
REGISTER ADDRESS
Figure 119. Single-Word I
Figure 121. Single-Word I
Figure 120. Burst Mode I
Figure 122. Burst Mode I
AS
AS
S
Rev. 0 | Page 72 of 296
REGISTER ADDRESS
DEVICE ADDRESS
AS
AS
DATA BYTE 1
2
2
2
C Write Format
2
C Read Format
C Write Format
C Read Format
Figure 122 shows the format of a burst mode read sequence.
This figure shows an example of a read from sequential single-
byte registers. The ADAU1373 increments its subaddress register
after every byte because the requested subaddress corresponds
to a register or memory area with a 1-byte word length. The
ADAU1373 always decodes the subaddress and sets the auto-
increment circuit so that the address increments after the
appropriate number of bytes.
Figure 119 to Figure 122 use the abbreviations shown in Table 33.
Table 33. Abbreviations for Read/Write Operations Format
Abbreviation
S
P
AM
AS
S
DEVICE ADDRESS
AS
AS
AS
DATA BYTE 1
DATA BYTE
DATA BYTE 2
Description
Start bit
Stop bit
Acknowledgment by master
Acknowledgment by slave
AS
AM
P
DATA BYTE
AS
DATA BYTE 2
DATA BYTE 3
AM
AM
...
P

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